AI BriefingNPU-Based LLM Serving: A Redesign for Maximum Scalability and Efficiency
Key point
Rebellions unveiled a high-efficiency LLM serving technology compatible with vLLM by optimizing FlashAttention and other techniques for NPUs.
Details
The core of the LLM era goes beyond model execution to designing efficient and scalable serving systems. Existing GPU-based serving suffers from high power consumption and cost issues, and solving this requires a serving approach optimized for NPU architecture.
Rebellions redesigned FlashAttention, PagedAttention, and Sliding Window Attention to match the NPU's memory hierarchy and computation model. Through this, they provide the vLLM RBLN plugin, enabling immediate use of NPU performance without modifying existing vLLM workflows.
The key optimization technologies are as follows:
- FlashAttention: Implemented a tile-based kernel optimized for the NPU's local SRAM size, reducing DRAM access and increasing computational efficiency.
- PagedAttention: Manages the KV cache in logical block units to prevent memory fragmentation, and supports flexible memory address access through dynamic DMA.
- Causal Mask & SDPA: Automatically handles Causal Mask inside the computation primitives, and fully supports PyTorch's SDPA interface.
These technologies form the foundation of RSD (Rebellions Scalable Design), enabling the construction of scalable distributed systems that support multi-node deployment and MoE routing.
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