Google Collaborating with AMD on Next-Gen TPU Design — Potential Hybrid AI ASIC with On-Package CPU Cores for Reinforcement Learning

News has emerged that Google is collaborating with AMD on the design of its next-generation TPU (Tensor Processing Unit).

This next-generation chip is being considered as a hybrid AI ASIC, exploring the integration of on-package CPU cores beyond traditional accelerator architectures.

The core objective of this design is to optimize Reinforcement Learning performance. By directly integrating CPU cores, it is expected that complex computations and control logic arising during the reinforcement learning process can be handled more efficiently.