NVIDIA Leverages Vera CPU to Accelerate Next-Generation CPU and GPU Design

As the complexity of modern chip design increases, NVIDIA is collaborating with industry leaders Cadence and Synopsys to optimize core electronic design automation (EDA) applications. NVIDIA is deploying Vera CPU across EDA workflows used in the development of next-generation CPUs and GPUs, demonstrating the utility of high-performance CPU architecture.

Chip production speed is a key factor in technological advancement. Core EDA workloads such as logic simulation, formal verification, and digital implementation still depend heavily on individual core performance, efficient memory systems, and strong throughput, making CPU architecture a critical factor in determining design verification speed.

NVIDIA's initial test results are as follows:

• Cadence Jasper: A formal verification platform that fixes bugs early in the design stage and improves productivity
• Synopsys VCS: A high-performance functional verification solution that simulates and verifies complex chip designs

Both applications recorded up to 1.5x higher performance on certain workloads. NVIDIA plans to continue boosting engineering productivity beyond simple benchmarks through application profiling and software optimization.

Vera CPU combines 88 custom NVIDIA Olympus CPU cores with a high-efficiency LPDDR5X memory subsystem and the 2nd generation NVIDIA Scalable Coherent Fabric. This delivers high memory bandwidth and low latency, enabling excellent performance even in environments with a mix of large-scale regression testing and latency-sensitive tasks.