AI Briefing#chip-design
The latest AI and developer news about #chip-design, with the original source and a short summary.
The latest AI and developer news about #chip-design, with the original source and a short summary.
The 65B dense model supports up to 1M context and was developed by a team that grew from 1 to 5 people.
The technology operates at 0.75V with data retention exceeding 128ms, targeting high-density processor caches with lower power consumption than SRAM.
The new service integrates OpenAI's frontier models with Synopsys' EDA tools to automate chip design workflows, currently in early engagements with major semiconductor customers.
Rebellions adopted AWS cloud infrastructure to significantly reduce execution times for AI NPU design verification and Physical Design tasks, thereby increasing development speed.
OpenAI's proprietary inference chip Jalapeño has been confirmed to significantly outperform existing systems in performance per watt and latency.
NVIDIA has introduced its own Vera CPU into EDA workflows to optimize the next-generation CPU and GPU design process.