AI BriefingMicron: HBM Requires 3x Wafer Area Compared to DDR5
Key point
Micron revealed at Hot Chips 2026 that HBM requires three times the wafer area of DDR5.
Details
At Hot Chips 2026, Micron stated that HBM consumes approximately three times the wafer area compared to DDR5 of the same capacity. The company projected that this ratio will not improve in future generations.
While HBM4 uses 256 memory banks, DDR5 has only 32. The primary causes of the increased area are additional data paths, power delivery, and TSV (Through-Silicon Vias) structures for connecting stacked dies.
As a result, every 1GB of HBM installed in a data center GPU effectively consumes the capacity of 3GB of standard DRAM. For example, the 144GB of HBM in a B100 GPU occupies the same wafer area as 432GB of standard DDR5. The shift to HBM by Micron, Samsung Electronics, and SK Hynix effectively reduces DRAM supply on a per-GB basis to two-thirds. Even with additional new wafer capacity next year, supply shortages are expected to persist.
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